Presentations:

1. “The Impact of Electrode Gap and Gas Injection on Plasma Etch Uniformity”
Mayumi Block, mayumi.block@lamrc.com, G.M. Amico, S. Sirard, J. Guha, A. Leming, A. Marakhtanov, E.A. Hudson, and M. Srinivasan, Lam Research
Abstract: At the 32nm node and below, etch rate and CD uniformity requirements for multi-layer low k dual damascene integration schemes continue to tighten. Additionally, more focus is being placed on the process uniformity at the outer 5mm of the wafer. This talk examines the effect of electrode gap and the distribution of gas injection in a capacitively coupled reactor with confined plasma and adjustable gap. Radial etch rate and CD uniformity were studied for different films, with emphasis on multi-layer DD integration schemes. Mechanisms for the influence of electrode gap on process uniformity are different for ion limited and neutral limited etch regimes. Oxide etch rate radial uniformity as a function of gap shows a correlation to ion flux measurements. Narrower gaps tend to increase edge etch rates for all films, but the gap for optimal uniformity is dependent upon film composition. For multi-layer processing, the overall uniformity can be improved by employing different gap settings for each process step.

2. “Effects of Plasma Etch and Ash Processes on Porous Low-k Film Surfaces in a Dual-Damascene Flow”
Yifeng Zhou, Yifeng_Zhou@amat.com, Applied Materials, Inc.; C.B. Labelle, GLOBALFOUNDRIES; D. Horak, IBM Research; K. Zhou, R. Patz, A. Darlak, J. Pender, Applied Materials, Inc.
Abstract: Porous ultra low k dielectrics (k < 2.4) are being integrated into current and future technology nodes. As film dielectric values are driven lower, new interactions are observed between the films and the plasma etch environments to which they are exposed. Some of these interactions are extensions of the chemical sensitivities previously observed for k=2.4 materials (i.e., plasma ash damage), while others are a result of the change in the microstructure of the films as additional porosity is incorporated to decrease dielectric constant (i.e., pore size, pore connectivity, etc.). Post etch and ash film surface roughness has often been observed with porous dielectrics and the etching and ashing process window to achieve a smooth dielectric surface decreases as the porosity increases. In this work, post-etch and/or ash film surface roughness effects will be examined for several different structures. The focus of the work is on a k=2.2 porous carbon doped oxide film utilizing a via first trench last integration scheme. Surface roughness phenomena are observed both on planar and vertical surfaces. In some cases, plasma modification to the film from one step is only observed several steps beyond the damage point. The sensitivity of the film requires careful control of every step of every plasma exposure to minimize cumulative and/or combinatory effects. Results will be presented highlighting some of the process spaces explored.

3. “Time-Resolved Two-Dimensional Wafer Surface Measurements for Process Optimization and Control”
Jeff Shields, jeffrey.shields@att.net, and Calvin Gabriel, Spansion, Inc., Greg Roche and Paul Arleo, KLA-Tencor
Abstract: Optimizing and monitoring plasma etching processes has always relied on one-dimensional data provided by the plasma tool (reflected power, Vdc, optical emission intensity, etc.) or by post-etch measurements such as critical dimensions or film thickness changes. It has long been desired to monitor the plasma condition across the wafer surface in real time. Wafer level sensors have been developed to measure the temperature of the wafer surface in near real time, and now sensors are being developed to monitor other plasma parameters in a similar way. Here we present measurements of Vrf, a parameter related to the plasma potential, taken from a two dimensional array of sensors across the surface of a 300 mm wafer processed in a multi-frequency, capacitively coupled industrial plasma for dielectric etching. We show the relationship between Vrf and several process parameters, including RF power, pressure, and CO flow rate. The one-dimensional electrostatic chuck voltage, Vesc, does not respond to these parameters in the same way. Some plasma transients were detected by Vrf that were not detected by Vesc or by optical emission intensity. Vrf appears to correlate with plasma density, and because it is an array of detectors, it proved useful in identifying degraded plasma uniformity at lower CO flows. Such wafer-level Vrf measurements may be valuable for applications such as plasma monitoring, chamber matching, and process optimization to minimize plasma process induced damage.

4. “Valence-band Structure and Charge Trapping During VUV Irradiation of BEOL Dielectrics” *
Jason L. Lauer, lauer@cae.wisc.edu, and J.L. Shohet, University of Wisconsin-Madison, A. Antonelli, Novellus, Inc., Y. Nishi, Stanford University
Abstract: Dielectrics used in back-end-of-the-line (BEOL) structures are often irradiated with photons of various energies during plasma processing, charge annealing, and curing of porous materials. In particular, processing plasmas produce significant amounts of vacuum ultraviolet (VUV) radiation which are, among other processes, capable of creating electron-hole pairs within dielectrics. As a result, VUV radiation has an impact on the electrical conductivity of dielectrics during plasma processing which can either contribute to or mitigate trapped charge within dielectrics. We compare the charging response of plasma-deposited SiOCH, SiN, SiCO, SiCN, and SiC dielectrics of various thicknesses on Si substrates after irradiation to VUV radiation. We choose to irradiate the dielectric layers with a photon energy of 9.5 eV because photons with this energy are often emitted from processing plasmas that contain oxygen, i.e. ashing and etching plasmas. The charging response of the dielectrics was evaluated by measuring the surface potential on the dielectrics with a Kelvin probe after irradiation with several doses of 9.5 eV photons. The surface potential on all of the dielectrics after VUV irradiation was positive due to the accumulation of positive charge by traps located within the dielectrics. By comparing the surface potential on several thicknesses of dielectrics after VUV irradiation, we can approximate the location within the dielectric the charge is trapped. The electronic structure of the valence band and defect states within the bandgap were measured using VUV-spectroscopy. For SiOCH, SiCO, and SiCN, we determine the holes are trapped by electronic states located 1.4 eV above the valence-band edge, which is believed to be due to oxygen-deficient Si bonds within the dielectric layers.

* Supported by the National Science Foundation under Grant Number DMR-0306582 and the Semiconductor Research Corporation under Contract Number 2008-KJ-1781. The Synchrotron Radiation Center is funded by the National Science Foundation under Grant Number DMR-0537588.

5. “Roles of vacuum ultraviolet radiation and ion bombardment in the roughening and degradation of photoresist polymers during plasma processing”
Dustin Nest, dgnest@berkeley.edu, T.-Y. Chung, J. J. Vegh and D. B. Graves, University of California, Berkeley; S. Engelmann, F. Weilnboeck, R. L. Bruce, T. C. Lin, R. Phaneuf and G. S. Oehrlein, University of Maryland, College Park; B. Long and G. Willson, University of Texas, Austin; E. A. Hudson, Lam Research Corp.; D. Wang, C. Andes, Dow Electronic Materials
Abstract: The patterning of critical dimension features using plasma processing continues to be a problem for the semiconductor industry. The inherently low etch resistance of current generation masking materials is compounded by a high degree of roughening when roughening tolerances are reduced during patterning of smaller feature sizes. Direct studies of plasma-photoresist surface interactions are difficult to conduct due to the complex nature of the plasma environment. Instead, we use an experimental beam system approach to impact the photoresist surface with well-characterized beams of various species which would be present during plasma processing. We have identified simultaneous exposure to vacuum ultraviolet (VUV) radiation, ion bombardment, and moderate substrate heating, acting synergistically, as a key process responsible for the surface roughening of current generation 193 nm photoresist masking materials. In addition, these findings have been extended to test other classes of polymers, where simultaneous exposure of poly(?-methyl styrene) to VUV and ions above its ceiling temperature also results in high levels of surface roughness.